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| NTD95N02R Power MOSFET 95 Amps, 24 Volts N-Channel DPAK Features http://onsemi.com V(BR)DSS 24 V RDS(ON) TYP 4.5 mW @ 10 V 5.9 mW @ 4.5 V ID MAX* 95 A * * * * * * * * * High Power and Current Handling Capability Fast Switching Performance Low RDS(on) to Minimize Conduction Loss Low Gate Charge to Minimize Switching Losses Pb-Free Packages are Available *ID MAX in the product summary table is continuous and steady at 25C. D Applications CPU Motherboard Vcore Applications High Frequency DC-DC Converters Motor Drives Bridge Circuits G S Unit V V C/W W 4 ID ID RqJA PD ID RqJA PD ID TJ, TSTG IS EAS 95 32 52 2.4 15.8 100 1.25 12 -55 to 150 45 84 A A C/W W A C/W W A C A mJ 1 2 3 123 Gate Drain Source 4 Drain DPAK CASE 369D (Straight Lead) STYLE 2 YWW T95 N02RG 12 3 DPAK CASE 369AA (Surface Mount) STYLE 2 MAXIMUM RATINGS (TJ = 25C unless otherwise specified) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Thermal Resistance, Junction-to-Case Total Power Dissipation @ TA = 25C Drain Current - - Continuous @ TA= 25C, Limited by Package - Continuous @ TA= 25C, Limited by Wires Thermal Resistance, Junction-to- Ambient (Note 1) - Total Power Dissipation @ TA = 25C - Drain Current - Continuous @ TA= 25C Thermal Resistance, Junction-to-Ambient (Note 2) - Total Power Dissipation @ TA = 25C - Drain Current - Continuous @ TA= 25C Operating Junction and Storage Temperature Continuous Source Current (Body Diode) Single Pulse Drain-to-Source Avalanche Energy - (VDD = 25 V, VG = 10, IPK = 13 A, L = 1 mH, RG= 25 W) Lead Temperature for Soldering Purposes (1/8 in from case for 10 seconds) Symbol VDSS VGS RqJC PD Value 24 20 1.45 86 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain YWW T95 N02RG 2 1 3 Drain Gate Source 4 TL 260 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surface mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq). Y WW T95N02R G = Year = Work Week = Device Code = Pb-Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. (c) Semiconductor Components Industries, LLC, 2006 1 July, 2006 - Rev. 3 Publication Order Number: NTD95N02R/D NTD95N02R THERMAL RESISTANCE RATINGS Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note 4) Symbol RqJC RqJA RqJA Value 1.45 52 100 Unit C/W 3. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 4. Surface mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq). ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/T J Symbol Test Condition VGS = 0 V, ID = 250 mA Min Typ Max Unit 24 29 15 V mV/C 1.5 10 100 nA mA IDSS VGS = 0 V, VDS = 20 V TJ = 25C TJ = 125C Gate-to-Source Leakage ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On-Resistance IGSS VGS(TH) VGS(TH)/TJ RDS(on) VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.0 5.0 VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 20 A VGS = 10 V, ID = 10 A 5.9 4.5 30 2.0 V mV/C 8.0 5.0 mW S pF Forward Transconductance gFS CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge CISS COSS CRSS QT QGS QGD SWITCHING CHARACTERISTICS Turn-on Delay Time Rise Time Turn-off Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD tRR Ta Tb QRR VGS = 0 V, dISD/dt = 100 A/ms, IS = 20 A VGS = 0 V, IS = 20 A TJ = 25C 0.83 45 20 30 50 nC 1.2 V ns td(on) tr td(off) tf VGS = 10 V, VDD = 10 V, ID = 30 A, RG = 3 W 10 82 26 70 ns VGS = 4.5 V, VDS = 10 V; ID = 10 A VGS = 0 V, f = 1.0 MHz, VDS = 20 V 2400 1020 390 21 4.4 9.1 nC 5. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. http://onsemi.com 2 NTD95N02R TYPICAL CHARACTERISTICS 200 180 ID, DRAIN CURRENT (A) 160 140 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 8 VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS = 10 V 7.0 V 5.0 V 220 TJ = 25C ID, DRAIN CURRENT (A) 4.2 V 4.0 V 3.6 V 3.4 V 3.2 V 3.0 V 2.8 V 2.6 V 2.4 V 9 10 200 180 160 140 120 100 80 60 40 20 0 0 1 2 TJ = 100C TJ = 25C TJ = -55C 3 4 5 6 VDS w 10 V VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.009 0.008 0.007 0.006 0.005 0.004 0.003 ID = 95 A TJ = 25C 0.016 0.014 0.012 0.010 0.008 0.006 0.004 0.002 10 VGS = 10 V 30 50 70 90 110 130 150 170 VGS = 4.5 V TJ = 25C 3 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On-Resistance versus Gate-to-Source Voltage RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) Figure 4. On-Resistance versus Drain Current and Gate Voltage 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 ID = 95 A VGS = 10 V 100000 VGS = 0 V IDSS, LEAKAGE (nA) 10000 TJ = 150C 1000 TJ = 100C -25 0 25 50 75 100 125 150 100 2 4 TJ, JUNCTION TEMPERATURE (C) 6 8 10 12 14 16 18 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 20 Figure 5. On-Resistance Variation with Temperature http://onsemi.com 3 Figure 6. Drain-to-Source Leakage Current versus Voltage NTD95N02R TYPICAL CHARACTERISTICS VGS, GATE-TO-SOURCE VOLTAGE (V) 5000 4500 C, CAPACITANCE (pF) 4000 3500 3000 2500 2000 1500 1000 500 0 10 5 0 5 10 15 CRSS 20 CRSS COSS CISS CISS VDS = 0 V 6 5 QT 4 3 2 1 0 QGS VDS QGD 4 VGS 8 12 VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS = 0 V TJ = 25C ID = 10 A TJ = 25C 0 4 8 12 16 20 Qg, TOTAL GATE CHARGE (nC) VGS VDS 0 24 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 1000 VDS = 10 V ID = 30 A VGS = 10 V 100 t, TIME (ns) tr tf td(off) 10 td(on) 100 90 IS, SOURCE CURRENT (A) 80 70 60 50 40 30 20 10 VGS = 0 V TJ = 25C 1 1 10 RG, GATE RESISTANCE (W) 100 0 0.4 0.6 0.8 1.0 1.2 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current ORDERING INFORMATION Device NTD95N02R NTD95N02RG NTD95N02R-001 NTD95N02R-001G NTD95N02RT4 NTD95N02RT4G Package DPAK DPAK (Pb-Free) DPAK DPAK (Pb-Free) DPAK DPAK (Pb-Free) Shipping 75 Units / Rail 75 Units / Rail 75 Units / Rail 75 Units / Rail 2500 Units / Tape & Reel 2500 Units / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NTD95N02R PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA-01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 --- 0.89 1.27 3.93 --- -T- B V R 4 SEATING PLANE C E A S 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NTD95N02R PACKAGE DIMENSIONS DPAK CASE 369D-01 ISSUE B B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -T- SEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 6 NTD95N02R/D |
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